Let Ib = the current into the base, Ic = the current into the collector, and Ie = the current out of the emitter. I will refer to the current gain of the device as beta (ß). These are current directions and voltage polarities for an NPN bipolar junction transistors; they are reversed for PNP devices. In Active (or linear mode), Ic = ßIb, Ie = (ß+1)Ib, and the virtual diode that is the Collector-Base junction is reverse biased (Vcb ≥ 0V). This forces the the Collector-Emitter volatage (Vce) to be: Vce ≥ 0.7V. (Note: The actual boundary point between active mode and saturation mode is a debatable issue; some people will say that Vce ≥ 1.4V is a requirement for the boundary point.) In saturation mode, so much base current is present that Ic < ßIb, Ie must be determined by direct measurement or Ie = Ic + Ib, and the Collector-Base junction is forward biased. The doping parameters of the Collector-Base junction are such that its forward voltage drop is slightly less than the Base-Emitter voltage drop; this tends to prevent Vce from becoming truly 0, instead, 0.7v ≥ Vce ≥ 0.2v tends to be the range for saturation mode. Another BIG difference between Active mode and Saturation mode, Active mode tends to be used for analog applications and Saturation mode tends to be used for digital applications.

Quite simply, in sauturation mode, the channel current will no longer increase with increasing drain voltage. In either subthreshold or linear mode, Ids will still increase with increasing Vds. By the way, in both modes, Ids will increase with increasing Vgs. (I've presumed you meant a MOSFET, not a BJT)